A Review of Low-Power Circuit Design for the Internet of Things based on CMOS

Jingchao Sun

doi:10.54691/71pd5276

Authors

Jingchao Sun School of Physics, Changchun University of Science and Technology, Changchun, Jilin, 130022, China

DOI:

https://doi.org/10.54691/71pd5276

Keywords:

Internet of Things; Low Power; CMOS.

Abstract

With the deployment of IoT nodes reaching the hundreds of billions, power consumption has become a key bottleneck limiting the operational lifespan and size of battery-powered and environmental energy harvesting nodes. Consequently, the design of ultra-low-power circuits operating at the nW–pW level using CMOS processes has emerged as a central issue in this field.This paper, themed ‘CMOS-based Low-Power Circuit Design for the Internet of Things’, systematically reviews and analyses 45 representative publications from 2012 to 2026, providing a comprehensive overview across various module dimensions including voltage and current reference sources, RF front-ends, power amplifiers, transceiver systems, digital and security circuits, and power management and energy harvesting.Analysis indicates that through technological innovations such as all-CMOS sub-threshold references, inductorless RF topologies, adiabatic logic, and adaptive duty-cycle power management, the power consumption of each module has steadily decreased from the early milliwatt range to the nW and even pW levels; advanced process nodes have extended from 0.18 μm to 7 nm FinFET, further enhancing energy efficiency and integration.However, existing research has largely focused on the performance limits of individual modules, lacking collaborative design verification that integrates the reference, front-end, power management and digital control into a complete system; furthermore, robustness data under process variations, electromagnetic interference and long-term ageing conditions remains relatively scarce.This review highlights that future research must seek an optimal trade-off between power consumption, performance and reliability in single-chip system integration, providing a reference for the fully integrated ultra-low-power design of passive and semi-passive IoT nodes.

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